CORE INSTRUCTION SET OPCODE NAME, MNEMONIC FOR-MAT OPERATION (in Verilog) / FUNCT (Hex) Add add R R[rd] = R[rs] + R[rt] (1) 0 / 20hex MIPS Reference Data Card ("Green Card") 1. Pull along perforation to separate card 2. Fold bottom side (columns 3 and 4) together FLOATING-POINT INSTRUCTION FORMATS EEL-4713C - Ann Gordon-Ross MIPS operations • See MIPS reference chart (green page of textbook) for full set of operations • Most common: addition and subtraction • MIPS assembly: add rd, rs, rt - register rd holds the sum of values currently in registers rs and rt EEL-4713C - Ann Gordon-Ross Memory Layout and Instruction Addressing Document Number: MD00086 Revision 0.95 March 12, 2001 MIPS Technologies, Inc. 1225 Charleston Road Mountain View, CA 94043-1353 MIPS32™ Architecture For Programmers The MIPS64 architecture is based on a fixed-length, regularly encoded instruction set, and it uses a load/store data model. It is streamlined to support optimized execution of high-level languages. Arithmetic and logic operations use a three-operand format, allowing compilers to optimize complex expressions formulation. MIPS Instructions Note: You can have this handout on both exams. Instruction Formats: Instruction formats: all 32 bits wide (one word): set less than unsigned: sltu instruction Identical as slt instruction, except: - funct = 43 dec - contents of R s and R t are considered as unsigned integers. Branch and Jump Instructions. In all instructions below, Src2 can either be a register or an immediate value (integer). Branch instructions use a signed 16-bit offset field; hence they can jump 2^15 -1 instructions (not bytes) forward or 2^15 instructions backward. The jump instruction contains a 26-bit address field. Lecture 2: MIPS Instruction Set • Today's topic: MIPS instructions • Reminder: sign up for the mailing list cs3810 • Reminder: set up your CADE accounts (EMCB 224) 2 Instruction Set • Understanding the language of the hardware is key to understanding the hardware/software interface • A program (in say, C) is compiled into an The MIPS ISA is a simple instruction set that is broken up into three distinct types of instructions, all 32-bits in length: R-Type or Register MIPS instructions are used for most arithmetic and logic operations; I-Type or Immediate instructions are used primarily for data transfer and immediate operations using constants; J-Type or Jump instructions are used to jump the program to the MIPS Instruction Set. An overview of the instruction set of the MIPS32 architecture as implemented by the MIPSY and SPIM emulators. Adapted from reference documents from the University of Stuttgart and Drexel University, from material in the appendix of Patterson and Hennessey's Computer Organization and Design, and from the MIPS32 (r5.04) Instruction Set reference. Example: Instruction Set Architecture MIPS • Representative of architectures developed since the 1980's • Used by NEC, Nintendo, Silicon Graphics, Sony • Real architecture but easy to understand MIPS: Microprocessor without Interlocked Pipeline Stages : ISA MIPS: Millions Instructions Per Sec: Measure The MIPS Instruction Set ! Used as the example throughout the book ! Large share of embedded core market but dwarfed by ARM ! Typical of many modern ISAs ! See MIPS Reference Data tear-out card, and Appendixes B and E CSE 420 Chapter 2 — Instructions: Language of the Computer — 4 Arithmetic Operations Lecture 3: MIPS Instruction Set • Today's topic: More MIPS instructions