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Download ppt "Compressed Instruction Cache Prepared By: Nicholas Meloche, David Lautenschlager, and Prashanth Janardanan Team Lugnuts." Similar presentations Cache compression can improve effectiveness of cache memories (increase L1 cache (data, instruction) Pros: L1 cache performance not affected. Adaptive Cache Compression for High-Performance Processors. Alaa Alameldeen and David Wood. University of Wisconsin-Madison. Wisconsin Multifacet Project. Elaborate cache compression techniques cannot be applied for L1 caches; Any compression technique that is applied to L1 caches should not require updates toIn this paper, we explored the issues for compressing the instruction cache. In the process, we discuss a high level implementation for a 64-bit, 5-stage Development of an algorithm for compression of a unified cache. Concatenate the opcodes of all the instructions row wise. Concatenate 2nd byte and so on Repetitive switching activity, convert computing activity to cache lookups Speculatively executing incorrect instructions is wasted activity. Instruction Cache Optimizations. 3. L1 Instruction Cache. loop caching. cache tuning. code compression. code reordering. filter caching. loop caching.